Module x86
x86 and x86_64 intrinsics.
Modules
- abm Advanced Bit Manipulation (ABM) instructions
- adx
- aes AES New Instructions (AES-NI)
- avx Advanced Vector Extensions (AVX)
- avx2 Advanced Vector Extensions 2 (AVX)
- avx512bf16 [AVX512BF16 intrinsics].
- avx512bitalg Bit-oriented Algorithms (BITALG)
- avx512bw
- avx512cd
- avx512dq
- avx512f
- avx512fp16
- avx512ifma
- avx512vbmi
- avx512vbmi2
- avx512vnni
- avx512vp2intersect Vector Pair Intersection to a Pair of Mask Registers (VP2INTERSECT)
- avx512vpopcntdq Vectorized Population Count Instructions for Double- and Quadwords (VPOPCNTDQ)
- avxneconvert
- bmi1 Bit Manipulation Instruction (BMI) Set 1.0.
- bmi2 Bit Manipulation Instruction (BMI) Set 2.0.
- bswap Byte swap intrinsics.
- bt
-
clflushopt
CLFLUSHOPTcache-line flush. -
cpuid
cpuidintrinsics -
eflags
i386intrinsics - f16c [F16C intrinsics].
- fma Fused Multiply-Add instruction set (FMA)
- fxsr FXSR floating-point context fast save and restore.
- gfni Galois Field New Instructions (GFNI)
- kl AES Key Locker Intrinsics
- macros Utility macros.
- movrs Read-shared move intrinsics
- pclmulqdq Carry-less Multiplication (CLMUL)
- rdrand RDRAND and RDSEED instructions for returning random numbers from an Intel on-chip hardware random number generator which has been seeded by an on-chip entropy source.
- rdtsc RDTSC instructions.
- rtm Intel's Restricted Transactional Memory (RTM).
- sha
- sse Streaming SIMD Extensions (SSE)
- sse2 Streaming SIMD Extensions 2 (SSE2)
- sse3 Streaming SIMD Extensions 3 (SSE3)
- sse41 Streaming SIMD Extensions 4.1 (SSE4.1)
- sse42 Streaming SIMD Extensions 4.2 (SSE4.2)
-
sse4a
i686's Streaming SIMD Extensions 4a (SSE4a) - ssse3 Supplemental Streaming SIMD Extensions 3 (SSSE3)
- tbm Trailing Bit Manipulation (TBM) instruction set.
- vaes Vectorized AES Instructions (VAES)
- vpclmulqdq Vectorized Carry-less Multiplication (VCLMUL)
-
xsave
i586'sxsaveandxsaveopttarget feature intrinsics
Structs
-
__m128
128-bit wide set of four
f32types, x86-specific -
__m128bh
128-bit wide set of eight
u16types, x86-specific -
__m128d
128-bit wide set of two
f64types, x86-specific -
__m128h
128-bit wide set of 8
f16types, x86-specific - __m128i 128-bit wide integer vector type, x86-specific
-
__m256
256-bit wide set of eight
f32types, x86-specific -
__m256bh
256-bit wide set of 16
u16types, x86-specific -
__m256d
256-bit wide set of four
f64types, x86-specific -
__m256h
256-bit wide set of 16
f16types, x86-specific - __m256i 256-bit wide integer vector type, x86-specific
-
__m512
512-bit wide set of sixteen
f32types, x86-specific -
__m512bh
512-bit wide set of 32
u16types, x86-specific -
__m512d
512-bit wide set of eight
f64types, x86-specific -
__m512h
512-bit wide set of 32
f16types, x86-specific - __m512i 512-bit wide integer vector type, x86-specific
- bf16 The BFloat16 type used in AVX-512 intrinsics.
Type Aliases
-
_MM_CMPINT_ENUM
The
_MM_CMPINT_ENUMtype used to specify comparison operations in AVX-512 intrinsics. -
_MM_MANTISSA_NORM_ENUM
The
MM_MANTISSA_NORM_ENUMtype used to specify mantissa normalized operations in AVX-512 intrinsics. -
_MM_MANTISSA_SIGN_ENUM
The
MM_MANTISSA_SIGN_ENUMtype used to specify mantissa signed operations in AVX-512 intrinsics. -
_MM_PERM_ENUM
The
MM_PERM_ENUMtype used to specify shuffle operations in AVX-512 intrinsics. -
__mmask16
The
__mmask16type used in AVX-512 intrinsics, a 16-bit integer -
__mmask32
The
__mmask32type used in AVX-512 intrinsics, a 32-bit integer -
__mmask64
The
__mmask64type used in AVX-512 intrinsics, a 64-bit integer -
__mmask8
The
__mmask8type used in AVX-512 intrinsics, a 8-bit integer