Module `wasm32`

Platform-specific intrinsics for the wasm32 platform.

This module provides intrinsics specific to the WebAssembly architecture. Here you'll find intrinsics specific to WebAssembly that aren't otherwise surfaced somewhere in a cross-platform abstraction of std, and you'll also find functions for leveraging WebAssembly proposals such as atomics and simd.

Intrinsics in the wasm32 module are modeled after the WebAssembly instructions that they represent. Most functions are named after the instruction they intend to correspond to, and the arguments/results correspond to the type signature of the instruction itself. Stable WebAssembly instructions are documented online.

If a proposal is not yet stable in WebAssembly itself then the functions within this function may be unstable and require the nightly channel of Rust to use. As the proposal itself stabilizes the intrinsics in this module should stabilize as well.

See the module documentation for general information about the arch module and platform intrinsics.

Atomics

The threads proposal for WebAssembly adds a number of instructions for dealing with multithreaded programs. Most instructions added in the atomics proposal are exposed in Rust through the std::sync::atomic module. Some instructions, however, don't have direct equivalents in Rust so they're exposed here instead.

Note that the instructions added in the atomics proposal can work in either a context with a shared wasm memory and without. These intrinsics are always available in the standard library, but you likely won't be able to use them too productively unless you recompile the standard library (and all your code) with -Ctarget-feature=+atomics.

It's also worth pointing out that multi-threaded WebAssembly and its story in Rust is still in a somewhat "early days" phase as of the time of this writing. Pieces should mostly work but it generally requires a good deal of manual setup. At this time it's not as simple as "just call std::thread::spawn", but it will hopefully get there one day!

SIMD

The simd proposal for WebAssembly added a new v128 type for a 128-bit SIMD register. It also added a large array of instructions to operate on the v128 type to perform data processing. Using SIMD on wasm is intended to be similar to as you would on x86_64, for example. You'd write a function such as:

#[cfg(target_arch = "wasm32")]
#[target_feature(enable = "simd128")]
unsafe fn uses_simd() {
    use std::arch::wasm32::*;
    // ...
}

Unlike x86_64, however, WebAssembly does not currently have dynamic detection at runtime as to whether SIMD is supported (this is one of the motivators for the conditional sections and feature detection proposals, but that is still pretty early days). This means that your binary will either have SIMD and can only run on engines which support SIMD, or it will not have SIMD at all. For compatibility the standard library itself does not use any SIMD internally. Determining how best to ship your WebAssembly binary with SIMD is largely left up to you as it can be pretty nuanced depending on your situation.

To enable SIMD support at compile time you need to do one of two things:

First you can annotate functions with #[target_feature(enable = "simd128")]. This causes just that one function to have SIMD support available to it, and intrinsics will get inlined as usual in this situation.
Second you can compile your program with -Ctarget-feature=+simd128. This compilation flag blanket enables SIMD support for your entire compilation. Note that this does not include the standard library unless you recompile the standard library.

If you enable SIMD via either of these routes then you'll have a WebAssembly binary that uses SIMD instructions, and you'll need to ship that accordingly. Also note that if you call SIMD intrinsics but don't enable SIMD via either of these mechanisms, you'll still have SIMD generated in your program. This means to generate a binary without SIMD you'll need to avoid both options above plus calling into any intrinsics in this module.

Modules

atomic
memory
relaxed_simd
simd128 This module implements the [WebAssembly SIMD128 ISA].

Structs

v128 WASM-specific 128-bit wide SIMD vector type.

Functions

f32_ceil Generates the [f32.ceil] instruction, returning the smallest integer greater than or equal to a.
f32_floor Generates the [f32.floor] instruction, returning the largest integer less than or equal to a.
f32_nearest Generates the [f32.nearest] instruction, roundinging to the nearest integer. Rounds half-way cases to the number with an even least significant digit.
f32_sqrt Generates the [f32.sqrt] instruction, returning the square root of the number a.
f32_trunc Generates the [f32.trunc] instruction, roundinging to the nearest integer towards zero.
f32x4 Materializes a SIMD value from the provided operands.
f32x4_abs Calculates the absolute value of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_add Lane-wise addition of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_ceil Lane-wise rounding to the nearest integral value not smaller than the input.
f32x4_convert_i32x4 Converts a 128-bit vector interpreted as four 32-bit signed integers into a 128-bit vector of four 32-bit floating point numbers.
f32x4_convert_u32x4 Converts a 128-bit vector interpreted as four 32-bit unsigned integers into a 128-bit vector of four 32-bit floating point numbers.
f32x4_demote_f64x2_zero Conversion of the two double-precision floating point lanes to two lower single-precision lanes of the result. The two higher lanes of the result are initialized to zero. If the conversion result is not representable as a single-precision floating point number, it is rounded to the nearest-even representable number.
f32x4_div Lane-wise division of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_eq Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_extract_lane Extracts a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
f32x4_floor Lane-wise rounding to the nearest integral value not greater than the input.
f32x4_ge Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_gt Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_le Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_lt Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_max Calculates the lane-wise minimum of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_min Calculates the lane-wise minimum of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_mul Lane-wise multiplication of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_ne Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_nearest Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
f32x4_neg Negates each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_pmax Lane-wise maximum value, defined as a < b ? b : a
f32x4_pmin Lane-wise minimum value, defined as b < a ? b : a
f32x4_relaxed_madd Computes a * b + c with either one rounding or two roundings.
f32x4_relaxed_max A relaxed version of f32x4_max which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
f32x4_relaxed_min A relaxed version of f32x4_min which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
f32x4_relaxed_nmadd Computes -a * b + c with either one rounding or two roundings.
f32x4_replace_lane Replaces a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
f32x4_splat Creates a vector with identical lanes.
f32x4_sqrt Calculates the square root of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_sub Lane-wise subtraction of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_trunc Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
f64_ceil Generates the [f64.ceil] instruction, returning the smallest integer greater than or equal to a.
f64_floor Generates the [f64.floor] instruction, returning the largest integer less than or equal to a.
f64_nearest Generates the [f64.nearest] instruction, roundinging to the nearest integer. Rounds half-way cases to the number with an even least significant digit.
f64_sqrt Generates the [f64.sqrt] instruction, returning the square root of the number a.
f64_trunc Generates the [f64.trunc] instruction, roundinging to the nearest integer towards zero.
f64x2 Materializes a SIMD value from the provided operands.
f64x2_abs Calculates the absolute value of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_add Lane-wise add of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_ceil Lane-wise rounding to the nearest integral value not smaller than the input.
f64x2_convert_low_i32x4 Lane-wise conversion from integer to floating point.
f64x2_convert_low_u32x4 Lane-wise conversion from integer to floating point.
f64x2_div Lane-wise divide of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_eq Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_extract_lane Extracts a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
f64x2_floor Lane-wise rounding to the nearest integral value not greater than the input.
f64x2_ge Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_gt Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_le Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_lt Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_max Calculates the lane-wise maximum of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_min Calculates the lane-wise minimum of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_mul Lane-wise multiply of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_ne Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_nearest Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
f64x2_neg Negates each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_pmax Lane-wise maximum value, defined as a < b ? b : a
f64x2_pmin Lane-wise minimum value, defined as b < a ? b : a
f64x2_promote_low_f32x4 Conversion of the two lower single-precision floating point lanes to the two double-precision lanes of the result.
f64x2_relaxed_madd Computes a * b + c with either one rounding or two roundings.
f64x2_relaxed_max A relaxed version of f64x2_max which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
f64x2_relaxed_min A relaxed version of f64x2_min which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
f64x2_relaxed_nmadd Computes -a * b + c with either one rounding or two roundings.
f64x2_replace_lane Replaces a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
f64x2_splat Creates a vector with identical lanes.
f64x2_sqrt Calculates the square root of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_sub Lane-wise subtract of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_trunc Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
i16x8 Materializes a SIMD value from the provided operands.
i16x8_abs Lane-wise wrapping absolute value.
i16x8_add Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
i16x8_add_sat Adds two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow to i16::MAX.
i16x8_all_true Returns true if all lanes are non-zero, false otherwise.
i16x8_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i16x8_eq Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
i16x8_extadd_pairwise_i8x16 Integer extended pairwise addition producing extended results (twice wider results than the inputs).
i16x8_extadd_pairwise_u8x16 Integer extended pairwise addition producing extended results (twice wider results than the inputs).
i16x8_extend_high_i8x16 Converts high half of the smaller lane vector to a larger lane vector, sign extended.
i16x8_extend_high_u8x16 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
i16x8_extend_low_i8x16 Converts low half of the smaller lane vector to a larger lane vector, sign extended.
i16x8_extend_low_u8x16 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
i16x8_extmul_high_i8x16 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extmul_high_u8x16 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extmul_low_i8x16 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extmul_low_u8x16 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extract_lane Extracts a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
i16x8_ge Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_gt Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_le Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_load_extend_i8x8 Load eight 8-bit integers and sign extend each one to a 16-bit lane
i16x8_load_extend_u8x8 Load eight 8-bit integers and zero extend each one to a 16-bit lane
i16x8_lt Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_max Compares lane-wise signed integers, and returns the maximum of each pair.
i16x8_min Compares lane-wise signed integers, and returns the minimum of each pair.
i16x8_mul Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
i16x8_narrow_i32x4 Converts two input vectors into a smaller lane vector by narrowing each lane.
i16x8_ne Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
i16x8_neg Negates a 128-bit vectors interpreted as eight 16-bit signed integers
i16x8_q15mulr_sat Lane-wise saturating rounding multiplication in Q15 format.
i16x8_relaxed_dot_i8x16_i7x16 A relaxed dot-product instruction.
i16x8_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
i16x8_relaxed_q15mulr A relaxed version of i16x8_relaxed_q15mulr where if both lanes are i16::MIN then the result is either i16::MIN or i16::MAX.
i16x8_replace_lane Replaces a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
i16x8_shl Shifts each lane to the left by the specified number of bits.
i16x8_shr Shifts each lane to the right by the specified number of bits, sign extending.
i16x8_shuffle Same as i8x16_shuffle, except operates as if the inputs were eight 16-bit integers, only taking 8 indices to shuffle.
i16x8_splat Creates a vector with identical lanes.
i16x8_sub Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
i16x8_sub_sat Subtracts two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow to i16::MIN.
i32x4 Materializes a SIMD value from the provided operands.
i32x4_abs Lane-wise wrapping absolute value.
i32x4_add Adds two 128-bit vectors as if they were two packed four 32-bit integers.
i32x4_all_true Returns true if all lanes are non-zero, false otherwise.
i32x4_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i32x4_dot_i16x8 Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results.
i32x4_eq Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
i32x4_extadd_pairwise_i16x8 Integer extended pairwise addition producing extended results (twice wider results than the inputs).
i32x4_extadd_pairwise_u16x8 Integer extended pairwise addition producing extended results (twice wider results than the inputs).
i32x4_extend_high_i16x8 Converts high half of the smaller lane vector to a larger lane vector, sign extended.
i32x4_extend_high_u16x8 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
i32x4_extend_low_i16x8 Converts low half of the smaller lane vector to a larger lane vector, sign extended.
i32x4_extend_low_u16x8 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
i32x4_extmul_high_i16x8 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extmul_high_u16x8 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extmul_low_i16x8 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extmul_low_u16x8 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extract_lane Extracts a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
i32x4_ge Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_gt Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_le Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_load_extend_i16x4 Load four 16-bit integers and sign extend each one to a 32-bit lane
i32x4_load_extend_u16x4 Load four 16-bit integers and zero extend each one to a 32-bit lane
i32x4_lt Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_max Compares lane-wise signed integers, and returns the maximum of each pair.
i32x4_min Compares lane-wise signed integers, and returns the minimum of each pair.
i32x4_mul Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
i32x4_ne Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
i32x4_neg Negates a 128-bit vectors interpreted as four 32-bit signed integers
i32x4_relaxed_dot_i8x16_i7x16_add Similar to i16x8_relaxed_dot_i8x16_i7x16 except that the intermediate i16x8 result is fed into i32x4_extadd_pairwise_i16x8 followed by i32x4_add to add the value c to the result.
i32x4_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
i32x4_relaxed_trunc_f32x4 A relaxed version of i32x4_trunc_sat_f32x4(a) converts the f32 lanes of a to signed 32-bit integers.
i32x4_relaxed_trunc_f64x2_zero A relaxed version of i32x4_trunc_sat_f64x2_zero(a) converts the f64 lanes of a to signed 32-bit integers and the upper two lanes are zero.
i32x4_replace_lane Replaces a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
i32x4_shl Shifts each lane to the left by the specified number of bits.
i32x4_shr Shifts each lane to the right by the specified number of bits, sign extending.
i32x4_shuffle Same as i8x16_shuffle, except operates as if the inputs were four 32-bit integers, only taking 4 indices to shuffle.
i32x4_splat Creates a vector with identical lanes.
i32x4_sub Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
i32x4_trunc_sat_f32x4 Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit signed integers.
i32x4_trunc_sat_f64x2_zero Saturating conversion of the two double-precision floating point lanes to two lower integer lanes using the IEEE convertToIntegerTowardZero function.
i64x2 Materializes a SIMD value from the provided operands.
i64x2_abs Lane-wise wrapping absolute value.
i64x2_add Adds two 128-bit vectors as if they were two packed two 64-bit integers.
i64x2_all_true Returns true if all lanes are non-zero, false otherwise.
i64x2_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i64x2_eq Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
i64x2_extend_high_i32x4 Converts high half of the smaller lane vector to a larger lane vector, sign extended.
i64x2_extend_high_u32x4 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
i64x2_extend_low_i32x4 Converts low half of the smaller lane vector to a larger lane vector, sign extended.
i64x2_extend_low_u32x4 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
i64x2_extmul_high_i32x4 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extmul_high_u32x4 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extmul_low_i32x4 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extmul_low_u32x4 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extract_lane Extracts a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
i64x2_ge Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_gt Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_le Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_load_extend_i32x2 Load two 32-bit integers and sign extend each one to a 64-bit lane
i64x2_load_extend_u32x2 Load two 32-bit integers and zero extend each one to a 64-bit lane
i64x2_lt Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_mul Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
i64x2_ne Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
i64x2_neg Negates a 128-bit vectors interpreted as two 64-bit signed integers
i64x2_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
i64x2_replace_lane Replaces a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
i64x2_shl Shifts each lane to the left by the specified number of bits.
i64x2_shr Shifts each lane to the right by the specified number of bits, sign extending.
i64x2_shuffle Same as i8x16_shuffle, except operates as if the inputs were two 64-bit integers, only taking 2 indices to shuffle.
i64x2_splat Creates a vector with identical lanes.
i64x2_sub Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
i8x16 Materializes a SIMD value from the provided operands.
i8x16_abs Lane-wise wrapping absolute value.
i8x16_add Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
i8x16_add_sat Adds two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow to i8::MAX.
i8x16_all_true Returns true if all lanes are non-zero, false otherwise.
i8x16_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i8x16_eq Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
i8x16_extract_lane Extracts a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
i8x16_ge Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_gt Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_le Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_lt Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_max Compares lane-wise signed integers, and returns the maximum of each pair.
i8x16_min Compares lane-wise signed integers, and returns the minimum of each pair.
i8x16_narrow_i16x8 Converts two input vectors into a smaller lane vector by narrowing each lane.
i8x16_ne Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
i8x16_neg Negates a 128-bit vectors interpreted as sixteen 8-bit signed integers
i8x16_popcnt Count the number of bits set to one within each lane.
i8x16_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
i8x16_relaxed_swizzle A relaxed version of i8x16_swizzle(a, s) which selects lanes from a using indices in s.
i8x16_replace_lane Replaces a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
i8x16_shl Shifts each lane to the left by the specified number of bits.
i8x16_shr Shifts each lane to the right by the specified number of bits, sign extending.
i8x16_shuffle Returns a new vector with lanes selected from the lanes of the two input vectors $a and $b specified in the 16 immediate operands.
i8x16_splat Creates a vector with identical lanes.
i8x16_sub Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
i8x16_sub_sat Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow to i8::MIN.
i8x16_swizzle Returns a new vector with lanes selected from the lanes of the first input vector a specified in the second input vector s.
llvm_any_true_i8x16
llvm_atomic_notify
llvm_atomic_wait_i32
llvm_atomic_wait_i64
llvm_avgr_u_i16x8
llvm_avgr_u_i8x16
llvm_bitmask_i16x8
llvm_bitmask_i32x4
llvm_bitmask_i64x2
llvm_bitmask_i8x16
llvm_bitselect
llvm_f32x4_fma
llvm_f32x4_fms
llvm_f32x4_max
llvm_f32x4_min
llvm_f32x4_nearest
llvm_f32x4_relaxed_max
llvm_f32x4_relaxed_min
llvm_f64x2_fma
llvm_f64x2_fms
llvm_f64x2_max
llvm_f64x2_min
llvm_f64x2_nearest
llvm_f64x2_relaxed_max
llvm_f64x2_relaxed_min
llvm_i16x8_all_true
llvm_i16x8_extadd_pairwise_i8x16_s
llvm_i16x8_extadd_pairwise_i8x16_u
llvm_i16x8_laneselect
llvm_i16x8_relaxed_dot_i8x16_i7x16_s
llvm_i32x4_all_true
llvm_i32x4_dot_i16x8_s
llvm_i32x4_extadd_pairwise_i16x8_s
llvm_i32x4_extadd_pairwise_i16x8_u
llvm_i32x4_laneselect
llvm_i32x4_relaxed_dot_i8x16_i7x16_add_s
llvm_i64x2_all_true
llvm_i64x2_laneselect
llvm_i8x16_all_true
llvm_i8x16_laneselect
llvm_memory_grow
llvm_memory_size
llvm_q15mulr
llvm_relaxed_q15mulr_signed
llvm_relaxed_swizzle
llvm_relaxed_trunc_signed
llvm_relaxed_trunc_signed_zero
llvm_relaxed_trunc_unsigned
llvm_relaxed_trunc_unsigned_zero
llvm_swizzle
memory_atomic_notify Corresponding intrinsic to wasm's [memory.atomic.notify instruction][instr]
memory_atomic_wait32 Corresponding intrinsic to wasm's [memory.atomic.wait32 instruction][instr]
memory_atomic_wait64 Corresponding intrinsic to wasm's [memory.atomic.wait64 instruction][instr]
memory_grow Corresponding intrinsic to wasm's [memory.grow instruction][instr]
memory_size Corresponding intrinsic to wasm's [memory.size instruction][instr]
u16x8 Materializes a SIMD value from the provided operands.
u16x8_add Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
u16x8_add_sat Adds two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to u16::MAX.
u16x8_all_true Returns true if all lanes are non-zero, false otherwise.
u16x8_avgr Lane-wise rounding average.
u16x8_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u16x8_eq Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
u16x8_extadd_pairwise_u8x16 Integer extended pairwise addition producing extended results (twice wider results than the inputs).
u16x8_extend_high_u8x16 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
u16x8_extend_low_u8x16 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
u16x8_extmul_high_u8x16 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u16x8_extmul_low_u8x16 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u16x8_extract_lane Extracts a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
u16x8_ge Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_gt Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_le Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_load_extend_u8x8 Load eight 8-bit integers and zero extend each one to a 16-bit lane
u16x8_lt Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_max Compares lane-wise unsigned integers, and returns the maximum of each pair.
u16x8_min Compares lane-wise unsigned integers, and returns the minimum of each pair.
u16x8_mul Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
u16x8_narrow_i32x4 Converts two input vectors into a smaller lane vector by narrowing each lane.
u16x8_ne Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
u16x8_relaxed_dot_i8x16_i7x16 A relaxed dot-product instruction.
u16x8_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
u16x8_relaxed_q15mulr A relaxed version of i16x8_relaxed_q15mulr where if both lanes are i16::MIN then the result is either i16::MIN or i16::MAX.
u16x8_replace_lane Replaces a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
u16x8_shl Shifts each lane to the left by the specified number of bits.
u16x8_shr Shifts each lane to the right by the specified number of bits, shifting in zeros.
u16x8_shuffle Same as i8x16_shuffle, except operates as if the inputs were eight 16-bit integers, only taking 8 indices to shuffle.
u16x8_splat Creates a vector with identical lanes.
u16x8_sub Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
u16x8_sub_sat Subtracts two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to 0.
u32x4 Materializes a SIMD value from the provided operands.
u32x4_add Adds two 128-bit vectors as if they were two packed four 32-bit integers.
u32x4_all_true Returns true if all lanes are non-zero, false otherwise.
u32x4_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u32x4_eq Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
u32x4_extadd_pairwise_u16x8 Integer extended pairwise addition producing extended results (twice wider results than the inputs).
u32x4_extend_high_u16x8 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
u32x4_extend_low_u16x8 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
u32x4_extmul_high_u16x8 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u32x4_extmul_low_u16x8 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u32x4_extract_lane Extracts a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
u32x4_ge Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_gt Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_le Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_load_extend_u16x4 Load four 16-bit integers and zero extend each one to a 32-bit lane
u32x4_lt Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_max Compares lane-wise unsigned integers, and returns the maximum of each pair.
u32x4_min Compares lane-wise unsigned integers, and returns the minimum of each pair.
u32x4_mul Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
u32x4_ne Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
u32x4_relaxed_dot_i8x16_i7x16_add Similar to i16x8_relaxed_dot_i8x16_i7x16 except that the intermediate i16x8 result is fed into i32x4_extadd_pairwise_i16x8 followed by i32x4_add to add the value c to the result.
u32x4_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
u32x4_relaxed_trunc_f32x4 A relaxed version of u32x4_trunc_sat_f32x4(a) converts the f32 lanes of a to unsigned 32-bit integers.
u32x4_relaxed_trunc_f64x2_zero A relaxed version of u32x4_trunc_sat_f64x2_zero(a) converts the f64 lanes of a to unsigned 32-bit integers and the upper two lanes are zero.
u32x4_replace_lane Replaces a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
u32x4_shl Shifts each lane to the left by the specified number of bits.
u32x4_shr Shifts each lane to the right by the specified number of bits, shifting in zeros.
u32x4_shuffle Same as i8x16_shuffle, except operates as if the inputs were four 32-bit integers, only taking 4 indices to shuffle.
u32x4_splat Creates a vector with identical lanes.
u32x4_sub Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
u32x4_trunc_sat_f32x4 Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit unsigned integers.
u32x4_trunc_sat_f64x2_zero Saturating conversion of the two double-precision floating point lanes to two lower integer lanes using the IEEE convertToIntegerTowardZero function.
u64x2 Materializes a SIMD value from the provided operands.
u64x2_add Adds two 128-bit vectors as if they were two packed two 64-bit integers.
u64x2_all_true Returns true if all lanes are non-zero, false otherwise.
u64x2_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u64x2_eq Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
u64x2_extend_high_u32x4 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
u64x2_extend_low_u32x4 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
u64x2_extmul_high_u32x4 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u64x2_extmul_low_u32x4 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u64x2_extract_lane Extracts a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
u64x2_load_extend_u32x2 Load two 32-bit integers and zero extend each one to a 64-bit lane
u64x2_mul Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
u64x2_ne Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
u64x2_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
u64x2_replace_lane Replaces a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
u64x2_shl Shifts each lane to the left by the specified number of bits.
u64x2_shr Shifts each lane to the right by the specified number of bits, shifting in zeros.
u64x2_shuffle Same as i8x16_shuffle, except operates as if the inputs were two 64-bit integers, only taking 2 indices to shuffle.
u64x2_splat Creates a vector with identical lanes.
u64x2_sub Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
u8x16 Materializes a SIMD value from the provided operands.
u8x16_add Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
u8x16_add_sat Adds two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to u8::MAX.
u8x16_all_true Returns true if all lanes are non-zero, false otherwise.
u8x16_avgr Lane-wise rounding average.
u8x16_bitmask Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u8x16_eq Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
u8x16_extract_lane Extracts a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
u8x16_ge Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_gt Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_le Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_lt Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_max Compares lane-wise unsigned integers, and returns the maximum of each pair.
u8x16_min Compares lane-wise unsigned integers, and returns the minimum of each pair.
u8x16_narrow_i16x8 Converts two input vectors into a smaller lane vector by narrowing each lane.
u8x16_ne Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
u8x16_popcnt Count the number of bits set to one within each lane.
u8x16_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
u8x16_relaxed_swizzle A relaxed version of i8x16_swizzle(a, s) which selects lanes from a using indices in s.
u8x16_replace_lane Replaces a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
u8x16_shl Shifts each lane to the left by the specified number of bits.
u8x16_shr Shifts each lane to the right by the specified number of bits, shifting in zeros.
u8x16_shuffle Returns a new vector with lanes selected from the lanes of the two input vectors $a and $b specified in the 16 immediate operands.
u8x16_splat Creates a vector with identical lanes.
u8x16_sub Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
u8x16_sub_sat Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to 0.
u8x16_swizzle Returns a new vector with lanes selected from the lanes of the first input vector a specified in the second input vector s.
unreachable Generates the unreachable instruction, which causes an unconditional [trap].
v128_and Performs a bitwise and of the two input 128-bit vectors, returning the resulting vector.
v128_andnot Bitwise AND of bits of a and the logical inverse of bits of b.
v128_any_true Returns true if any bit in a is set, or false otherwise.
v128_bitselect Use the bitmask in c to select bits from v1 when 1 and v2 when 0.
v128_load Loads a v128 vector from the given heap address.
v128_load16_lane Loads a 16-bit value from m and sets lane L of v to that value.
v128_load16_splat Load a single element and splat to all lanes of a v128 vector.
v128_load32_lane Loads a 32-bit value from m and sets lane L of v to that value.
v128_load32_splat Load a single element and splat to all lanes of a v128 vector.
v128_load32_zero Load a 32-bit element into the low bits of the vector and sets all other bits to zero.
v128_load64_lane Loads a 64-bit value from m and sets lane L of v to that value.
v128_load64_splat Load a single element and splat to all lanes of a v128 vector.
v128_load64_zero Load a 64-bit element into the low bits of the vector and sets all other bits to zero.
v128_load8_lane Loads an 8-bit value from m and sets lane L of v to that value.
v128_load8_splat Load a single element and splat to all lanes of a v128 vector.
v128_not Flips each bit of the 128-bit input vector.
v128_or Performs a bitwise or of the two input 128-bit vectors, returning the resulting vector.
v128_store Stores a v128 vector to the given heap address.
v128_store16_lane Stores the 16-bit value from lane L of v into m
v128_store32_lane Stores the 32-bit value from lane L of v into m
v128_store64_lane Stores the 64-bit value from lane L of v into m
v128_store8_lane Stores the 8-bit value from lane L of v into m
v128_xor Performs a bitwise xor of the two input 128-bit vectors, returning the resulting vector.

Macros

conversions