Module arm_shared
ARM C Language Extensions (ACLE)
Developer notes
Below is a list of built-in targets that are representative of the different ARM
architectures; the list includes the target_features they possess.
armv4t-unknown-linux-gnueabi- ARMv4 -+v4tarmv5te-unknown-linux-gnueabi- ARMv5TE -+v4t +v5tearm-unknown-linux-gnueabi- ARMv6 -+v4t +v5te +v6thumbv6m-none-eabi- ARMv6-M -+v4t +v5te +v6 +thumb-mode +mclassarmv7-unknown-linux-gnueabihf- ARMv7-A -+v4t +v5te +v6 +v6k +v6t2 +v7 +dsp +thumb2 +aclassarmv7r-none-eabi- ARMv7-R -+v4t +v5te +v6 +v6k +v6t2 +v7 +dsp +thumb2 +rclassthumbv7m-none-eabi- ARMv7-M -+v4t +v5te +v6 +v6k +v6t2 +v7 +thumb2 +thumb-mode +mclassthumbv7em-none-eabi- ARMv7E-M -+v4t +v5te +v6 +v6k +v6t2 +v7 +dsp +thumb2 +thumb-mode +mclassthumbv8m.main-none-eabi- ARMv8-M -+v4t +v5te +v6 +v6k +v6t2 +v7 +thumb2 +thumb-mode +mclassarmv8r-none-eabi- ARMv8-R -+v4t +v5te +v6 +v6k +v6t2 +v7 +v8 +thumb2 +rclassaarch64-unknown-linux-gnu- ARMv8-A (AArch64) -+fp +neon
Section 10.1 of ACLE says:
-
"In the sequence of Arm architectures { v5, v5TE, v6, v6T2, v7 } each architecture includes its predecessor's instruction set."
-
"In the sequence of Thumb-only architectures { v6-M, v7-M, v7E-M } each architecture includes its predecessor's instruction set."
From that info and from looking at how LLVM features work (using custom targets) we can identify features that are subsets of others:
Legend: a < b reads as "a is a subset of b"; this means that if b is enabled then a is
enabled as well.
v4t < v5te < v6 < v6k < v6t2 < v7 < v8v6 < v8m < v6t2v7 < v8m.main
NOTE: Section 5.4.7 of ACLE says:
- "__ARM_FEATURE_DSP is defined to 1 if the DSP (v5E) instructions are supported and the intrinsics defined in Saturating intrinsics are available."
This does not match how LLVM uses the '+dsp' feature; this feature is not set for v5te targets so we have to work around this difference.