Module relaxed_simd

Functions

• f32x4_relaxed_madd Computes a * b + c with either one rounding or two roundings.
• f32x4_relaxed_max A relaxed version of f32x4_max which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
• f32x4_relaxed_min A relaxed version of f32x4_min which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
• f32x4_relaxed_nmadd Computes -a * b + c with either one rounding or two roundings.
• f64x2_relaxed_madd Computes a * b + c with either one rounding or two roundings.
• f64x2_relaxed_max A relaxed version of f64x2_max which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
• f64x2_relaxed_min A relaxed version of f64x2_min which has implementation-specific behavior when its operands are NaN or signed zeroes. For more information, see the WebAssembly specification.
• f64x2_relaxed_nmadd Computes -a * b + c with either one rounding or two roundings.
• i16x8_relaxed_dot_i8x16_i7x16 A relaxed dot-product instruction.
• i16x8_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• i16x8_relaxed_q15mulr A relaxed version of i16x8_relaxed_q15mulr where if both lanes are i16::MIN then the result is either i16::MIN or i16::MAX.
• i32x4_relaxed_dot_i8x16_i7x16_add Similar to i16x8_relaxed_dot_i8x16_i7x16 except that the intermediate i16x8 result is fed into i32x4_extadd_pairwise_i16x8 followed by i32x4_add to add the value c to the result.
• i32x4_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• i32x4_relaxed_trunc_f32x4 A relaxed version of i32x4_trunc_sat_f32x4(a) converts the f32 lanes of a to signed 32-bit integers.
• i32x4_relaxed_trunc_f64x2_zero A relaxed version of i32x4_trunc_sat_f64x2_zero(a) converts the f64 lanes of a to signed 32-bit integers and the upper two lanes are zero.
• i64x2_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• i8x16_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• i8x16_relaxed_swizzle A relaxed version of i8x16_swizzle(a, s) which selects lanes from a using indices in s.
• llvm_f32x4_fma
• llvm_f32x4_fms
• llvm_f32x4_relaxed_max
• llvm_f32x4_relaxed_min
• llvm_f64x2_fma
• llvm_f64x2_fms
• llvm_f64x2_relaxed_max
• llvm_f64x2_relaxed_min
• llvm_i16x8_laneselect
• llvm_i16x8_relaxed_dot_i8x16_i7x16_s
• llvm_i32x4_laneselect
• llvm_i32x4_relaxed_dot_i8x16_i7x16_add_s
• llvm_i64x2_laneselect
• llvm_i8x16_laneselect
• llvm_relaxed_q15mulr_signed
• llvm_relaxed_swizzle
• llvm_relaxed_trunc_signed
• llvm_relaxed_trunc_signed_zero
• llvm_relaxed_trunc_unsigned
• llvm_relaxed_trunc_unsigned_zero
• u16x8_relaxed_dot_i8x16_i7x16 A relaxed dot-product instruction.
• u16x8_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• u16x8_relaxed_q15mulr A relaxed version of i16x8_relaxed_q15mulr where if both lanes are i16::MIN then the result is either i16::MIN or i16::MAX.
• u32x4_relaxed_dot_i8x16_i7x16_add Similar to i16x8_relaxed_dot_i8x16_i7x16 except that the intermediate i16x8 result is fed into i32x4_extadd_pairwise_i16x8 followed by i32x4_add to add the value c to the result.
• u32x4_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• u32x4_relaxed_trunc_f32x4 A relaxed version of u32x4_trunc_sat_f32x4(a) converts the f32 lanes of a to unsigned 32-bit integers.
• u32x4_relaxed_trunc_f64x2_zero A relaxed version of u32x4_trunc_sat_f64x2_zero(a) converts the f64 lanes of a to unsigned 32-bit integers and the upper two lanes are zero.
• u64x2_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• u8x16_relaxed_laneselect A relaxed version of v128_bitselect where this either behaves the same as v128_bitselect or the high bit of each lane m is inspected and the corresponding lane of a is chosen if the bit is 1 or the lane of b is chosen if it's zero.
• u8x16_relaxed_swizzle A relaxed version of i8x16_swizzle(a, s) which selects lanes from a using indices in s.