Enum Feature

Variants

aes

AES (Advanced Encryption Standard New Instructions AES-NI)

pclmulqdq

CLMUL (Carry-less Multiplication)

rdrand

RDRAND

rdseed

RDSEED

tsc

TSC (Time Stamp Counter)

mmx

MMX (MultiMedia eXtensions)

sse

SSE (Streaming SIMD Extensions)

sse2

SSE2 (Streaming SIMD Extensions 2)

sse3

SSE3 (Streaming SIMD Extensions 3)

ssse3

SSSE3 (Supplemental Streaming SIMD Extensions 3)

sse4_1

SSE4.1 (Streaming SIMD Extensions 4.1)

sse4_2

SSE4.2 (Streaming SIMD Extensions 4.2)

sse4a

SSE4a (Streaming SIMD Extensions 4a)

sha

SHA

avx

AVX (Advanced Vector Extensions)

avx2

AVX2 (Advanced Vector Extensions 2)

sha512

SHA512

sm3

SM3

sm4

SM4

avx512f

AVX-512 F (Foundation)

avx512cd

AVX-512 CD (Conflict Detection Instructions)

avx512er

AVX-512 ER (Expo nential and Reciprocal Instructions)

avx512pf

AVX-512 PF (Prefetch Instructions)

avx512bw

AVX-512 BW (Byte and Word Instructions)

avx512dq

AVX-512 DQ (Doubleword and Quadword)

avx512vl

AVX-512 VL (Vector Length Extensions)

avx512ifma

AVX-512 IFMA (Integer Fused Multiply Add)

avx512vbmi

AVX-512 VBMI (Vector Byte Manipulation Instructions)

avx512vpopcntdq

AVX-512 VPOPCNTDQ (Vector Population Count Doubleword and Quadword)

avx512vbmi2

AVX-512 VBMI2 (Additional byte, word, dword and qword capabilities)

gfni

AVX-512 GFNI (Galois Field New Instruction)

vaes

AVX-512 VAES (Vector AES instruction)

vpclmulqdq

AVX-512 VPCLMULQDQ (Vector PCLMULQDQ instructions)

avx512vnni

AVX-512 VNNI (Vector Neural Network Instructions)

avx512bitalg

AVX-512 BITALG (Support for VPOPCNT[B,W] and VPSHUFBITQMB)

avx512bf16

AVX-512 BF16 (BFLOAT16 instructions)

avx512vp2intersect

AVX-512 P2INTERSECT

avx512fp16

AVX-512 FP16 (FLOAT16 instructions)

avxifma

AVX-IFMA (Integer Fused Multiply Add)

avxneconvert

AVX-NE-CONVERT (Exceptionless Convert)

avxvnni

AVX-VNNI (Vector Neural Network Instructions)

avxvnniint16

AVX-VNNI_INT8 (VNNI with 16-bit Integers)

avxvnniint8

AVX-VNNI_INT16 (VNNI with 8-bit integers)

amx_tile

AMX (Advanced Matrix Extensions) - Tile load/store

amx_int8

AMX-INT8 (Operations on 8-bit integers)

amx_bf16

AMX-BF16 (BFloat16 Operations)

amx_fp16

AMX-FP16 (Float16 Operations)

amx_complex

AMX-COMPLEX (Complex number Operations)

amx_avx512

AMX-AVX512 (AVX512 operations extended to matrices)

amx_fp8

AMX-FP8 (Float8 Operations)

amx_movrs

AMX-MOVRS (Matrix MOVERS operations)

apxf

APX-F (Advanced Performance Extensions - Foundation)

avx10_1

AVX10.1

avx10_2

AVX10.2

f16c

F16C (Conversions between IEEE-754 binary16 and binary32 formats)

fma

FMA (Fused Multiply Add)

bmi1

BMI1 (Bit Manipulation Instructions 1)

bmi2

BMI2 (Bit Manipulation Instructions 2)

lzcnt

ABM (Advanced Bit Manipulation) / LZCNT (Leading Zero Count)

tbm

TBM (Trailing Bit Manipulation)

popcnt

POPCNT (Population Count)

fxsr

FXSR (Floating-point context fast save and restore)

xsave

XSAVE (Save Processor Extended States)

xsaveopt

XSAVEOPT (Save Processor Extended States Optimized)

xsaves

XSAVES (Save Processor Extended States Supervisor)

xsavec

XSAVEC (Save Processor Extended States Compacted)

cmpxchg16b

CMPXCH16B (16-byte compare-and-swap instruction)

clflushopt

CLFLUSHOPT (Cache Line Flush Optimized)

kl

Intel Key Locker

widekl

Intel Key Locker Wide

adx

ADX, Intel ADX (Multi-Precision Add-Carry Instruction Extensions)

rtm

RTM, Intel (Restricted Transactional Memory)

movbe

MOVBE (Move Data After Swapping Bytes)

movrs

MOVRS (Move data with the read-shared hint)

ermsb

ERMSB, Enhanced REP MOVSB and STOSB

xop

XOP: eXtended Operations (AMD)

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