Creates a new AtomicBool.

Examples

use std::sync::atomic::AtomicBool;

let atomic_true = AtomicBool::new(true);
let atomic_false = AtomicBool::new(false);

Creates a new AtomicBool from a pointer.

Examples

use std::sync::atomic::{self, AtomicBool};

// Get a pointer to an allocated value
let ptr: *mut bool = Box::into_raw(Box::new(false));

assert!(ptr.cast::<AtomicBool>().is_aligned());

{
    // Create an atomic view of the allocated value
    let atomic = unsafe { AtomicBool::from_ptr(ptr) };

    // Use `atomic` for atomic operations, possibly share it with other threads
    atomic.store(true, atomic::Ordering::Relaxed);
}

// It's ok to non-atomically access the value behind `ptr`,
// since the reference to the atomic ended its lifetime in the block above
assert_eq!(unsafe { *ptr }, true);

// Deallocate the value
unsafe { drop(Box::from_raw(ptr)) }

Safety

• ptr must be aligned to align_of::<AtomicBool>() (note that this is always true, since align_of::<AtomicBool>() == 1).
• ptr must be valid for both reads and writes for the whole lifetime 'a.
• You must adhere to the Memory model for atomic accesses. In particular, it is not allowed to mix conflicting atomic and non-atomic accesses, or atomic accesses of different sizes, without synchronization.

Creates a new pointer to AtomicBool from a pointer.

This is useful if you want to do volatile atomic accesses, and thus avoid creating a reference to the destination.

Returns a mutable reference to the underlying bool.

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let mut some_bool = AtomicBool::new(true);
assert_eq!(*some_bool.get_mut(), true);
*some_bool.get_mut() = false;
assert_eq!(some_bool.load(Ordering::SeqCst), false);

Gets atomic access to a &mut bool.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let mut some_bool = true;
let a = AtomicBool::from_mut(&mut some_bool);
a.store(false, Ordering::Relaxed);
assert_eq!(some_bool, false);

Gets non-atomic access to a &mut [AtomicBool] slice.

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let mut some_bools = [const { AtomicBool::new(false) }; 10];

let view: &mut [bool] = AtomicBool::get_mut_slice(&mut some_bools);
assert_eq!(view, [false; 10]);
view[..5].copy_from_slice(&[true; 5]);

std::thread::scope(|s| {
    for t in &some_bools[..5] {
        s.spawn(move || assert_eq!(t.load(Ordering::Relaxed), true));
    }

    for f in &some_bools[5..] {
        s.spawn(move || assert_eq!(f.load(Ordering::Relaxed), false));
    }
});

Gets atomic access to a &mut [bool] slice.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let mut some_bools = [false; 10];
let a = &*AtomicBool::from_mut_slice(&mut some_bools);
std::thread::scope(|s| {
    for i in 0..a.len() {
        s.spawn(move || a[i].store(true, Ordering::Relaxed));
    }
});
assert_eq!(some_bools, [true; 10]);

Consumes the atomic and returns the contained value.

This is safe because passing self by value guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::AtomicBool;

let some_bool = AtomicBool::new(true);
assert_eq!(some_bool.into_inner(), true);

Loads a value from the bool.

load takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Panics

Panics if order is Release or AcqRel.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let some_bool = AtomicBool::new(true);

assert_eq!(some_bool.load(Ordering::Relaxed), true);

Perform a volatile atomic load from the bool.

load_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls, but less opaque), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [load][Self::load], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to reusing data from a previous load. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for reads. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a read are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance][crate::ptr::without_provenance]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic load. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be valid for reads, or self must point to memory outside of all Rust allocations and reading from that memory must:

  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

• Reading from self must produce a properly initialized value of type bool.

Panics

Panics if order is Release or AcqRel.

Stores a value into the bool.

store takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Panics

Panics if order is Acquire or AcqRel.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let some_bool = AtomicBool::new(true);

some_bool.store(false, Ordering::Relaxed);
assert_eq!(some_bool.load(Ordering::Relaxed), false);

Performs a volatile atomic store into the bool.

store_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [store][Self::store], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to a register access. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for writes. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a write are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance_mut][crate::ptr::without_provenance_mut]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic store. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be either valid for writes, or self must point to memory outside of all Rust allocations and writing to that memory must:
  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

Panics

Panics if order is Acquire or AcqRel.

Stores a value into the bool, returning the previous value.

swap takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let some_bool = AtomicBool::new(true);

assert_eq!(some_bool.swap(false, Ordering::Relaxed), true);
assert_eq!(some_bool.load(Ordering::Relaxed), false);

Stores a value into the bool if the current value is the same as the current value.

The return value is always the previous value. If it is equal to current, then the value was updated.

compare_and_swap also takes an Ordering argument which describes the memory ordering of this operation. Notice that even when using AcqRel, the operation might fail and hence just perform an Acquire load, but not have Release semantics. Using Acquire makes the store part of this operation Relaxed if it happens, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Migrating to compare_exchange and compare_exchange_weak

compare_and_swap is equivalent to compare_exchange with the following mapping for memory orderings:

compare_and_swap and compare_exchange also differ in their return type. You can use compare_exchange(...).unwrap_or_else(|x| x) to recover the behavior of compare_and_swap, but in most cases it is more idiomatic to check whether the return value is Ok or Err rather than to infer success vs failure based on the value that was read.

During migration, consider whether it makes sense to use compare_exchange_weak instead. compare_exchange_weak is allowed to fail spuriously even when the comparison succeeds, which allows the compiler to generate better assembly code when the compare and swap is used in a loop.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let some_bool = AtomicBool::new(true);

assert_eq!(some_bool.compare_and_swap(true, false, Ordering::Relaxed), true);
assert_eq!(some_bool.load(Ordering::Relaxed), false);

assert_eq!(some_bool.compare_and_swap(true, true, Ordering::Relaxed), false);
assert_eq!(some_bool.load(Ordering::Relaxed), false);

Stores a value into the bool if the current value is the same as the current value.

The return value is a result indicating whether the new value was written and containing the previous value. On success this value is guaranteed to be equal to current.

compare_exchange takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let some_bool = AtomicBool::new(true);

assert_eq!(some_bool.compare_exchange(true,
                                      false,
                                      Ordering::Acquire,
                                      Ordering::Relaxed),
           Ok(true));
assert_eq!(some_bool.load(Ordering::Relaxed), false);

assert_eq!(some_bool.compare_exchange(true, true,
                                      Ordering::SeqCst,
                                      Ordering::Acquire),
           Err(false));
assert_eq!(some_bool.load(Ordering::Relaxed), false);

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim. This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. In this case, compare_exchange can lead to the ABA problem.

Stores a value into the bool if the current value is the same as the current value.

Unlike AtomicBool::compare_exchange, this function is allowed to spuriously fail even when the comparison succeeds, which can result in more efficient code on some platforms. The return value is a result indicating whether the new value was written and containing the previous value.

compare_exchange_weak takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let val = AtomicBool::new(false);

let new = true;
let mut old = val.load(Ordering::Relaxed);
loop {
    match val.compare_exchange_weak(old, new, Ordering::SeqCst, Ordering::Relaxed) {
        Ok(_) => break,
        Err(x) => old = x,
    }
}

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim. This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. In this case, compare_exchange can lead to the ABA problem.

Logical "and" with a boolean value.

Performs a logical "and" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_and takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_and(false, Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst), false);

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_and(true, Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst), true);

let foo = AtomicBool::new(false);
assert_eq!(foo.fetch_and(false, Ordering::SeqCst), false);
assert_eq!(foo.load(Ordering::SeqCst), false);

Logical "nand" with a boolean value.

Performs a logical "nand" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_nand takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_nand(false, Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst), true);

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_nand(true, Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst) as usize, 0);
assert_eq!(foo.load(Ordering::SeqCst), false);

let foo = AtomicBool::new(false);
assert_eq!(foo.fetch_nand(false, Ordering::SeqCst), false);
assert_eq!(foo.load(Ordering::SeqCst), true);

Logical "or" with a boolean value.

Performs a logical "or" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_or takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_or(false, Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst), true);

let foo = AtomicBool::new(false);
assert_eq!(foo.fetch_or(true, Ordering::SeqCst), false);
assert_eq!(foo.load(Ordering::SeqCst), true);

let foo = AtomicBool::new(false);
assert_eq!(foo.fetch_or(false, Ordering::SeqCst), false);
assert_eq!(foo.load(Ordering::SeqCst), false);

Logical "xor" with a boolean value.

Performs a logical "xor" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_xor takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_xor(false, Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst), true);

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_xor(true, Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst), false);

let foo = AtomicBool::new(false);
assert_eq!(foo.fetch_xor(false, Ordering::SeqCst), false);
assert_eq!(foo.load(Ordering::SeqCst), false);

Logical "not" with a boolean value.

Performs a logical "not" operation on the current value, and sets the new value to the result.

Returns the previous value.

fetch_not takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let foo = AtomicBool::new(true);
assert_eq!(foo.fetch_not(Ordering::SeqCst), true);
assert_eq!(foo.load(Ordering::SeqCst), false);

let foo = AtomicBool::new(false);
assert_eq!(foo.fetch_not(Ordering::SeqCst), false);
assert_eq!(foo.load(Ordering::SeqCst), true);

Returns a mutable pointer to the underlying bool.

Doing non-atomic reads and writes on the resulting boolean can be a data race. This method is mostly useful for FFI, where the function signature may use *mut bool instead of &AtomicBool.

Returning an *mut pointer from a shared reference to this atomic is safe because the atomic types work with interior mutability. All modifications of an atomic change the value through a shared reference, and can do so safely as long as they use atomic operations. Any use of the returned raw pointer requires an unsafe block and still has to uphold the requirements of the memory model.

Examples

# fn main() {
use std::sync::atomic::AtomicBool;

extern "C" {
    fn my_atomic_op(arg: *mut bool);
}

let mut atomic = AtomicBool::new(true);
unsafe {
    my_atomic_op(atomic.as_ptr());
}
# }

An alias for AtomicBool::try_update.

Fetches the value, and applies a function to it that returns an optional new value. Returns a Result of Ok(previous_value) if the function returned Some(_), else Err(previous_value).

See also: update.

Note: This may call the function multiple times if the value has been changed from other threads in the meantime, as long as the function returns Some(_), but the function will have been applied only once to the stored value.

try_update takes two Ordering arguments to describe the memory ordering of this operation. The first describes the required ordering for when the operation finally succeeds while the second describes the required ordering for loads. These correspond to the success and failure orderings of AtomicBool::compare_exchange respectively.

Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the final successful load Relaxed. The (failed) load ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Considerations

This method is not magic; it is not provided by the hardware, and does not act like a critical section or mutex.

It is implemented on top of an atomic compare-and-swap operation, and thus is subject to the usual drawbacks of CAS operations. In particular, be careful of the ABA problem.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let x = AtomicBool::new(false);
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(false));
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(!x)), Ok(false));
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(!x)), Ok(true));
assert_eq!(x.load(Ordering::SeqCst), false);

Fetches the value, and applies a function to it that returns a new value. The new value is stored and the old value is returned.

See also: try_update.

Note: This may call the function multiple times if the value has been changed from other threads in the meantime, but the function will have been applied only once to the stored value.

update takes two Ordering arguments to describe the memory ordering of this operation. The first describes the required ordering for when the operation finally succeeds while the second describes the required ordering for loads. These correspond to the success and failure orderings of AtomicBool::compare_exchange respectively.

Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the final successful load Relaxed. The (failed) load ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on u8.

Considerations

This method is not magic; it is not provided by the hardware, and does not act like a critical section or mutex.

It is implemented on top of an atomic compare-and-swap operation, and thus is subject to the usual drawbacks of CAS operations. In particular, be careful of the ABA problem.

Examples

use std::sync::atomic::{AtomicBool, Ordering};

let x = AtomicBool::new(false);
assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| !x), false);
assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| !x), true);
assert_eq!(x.load(Ordering::SeqCst), false);

Creates a new atomic integer.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::AtomicI128;

let atomic_forty_two = AtomicI128::new(42);

Creates a new reference to an atomic integer from a pointer.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{self, AtomicI128};

// Get a pointer to an allocated value
let ptr: *mut i128 = Box::into_raw(Box::new(0));

assert!(ptr.cast::<AtomicI128>().is_aligned());

{
    // Create an atomic view of the allocated value
    let atomic = unsafe {AtomicI128::from_ptr(ptr) };

    // Use `atomic` for atomic operations, possibly share it with other threads
    atomic.store(1, atomic::Ordering::Relaxed);
}

// It's ok to non-atomically access the value behind `ptr`,
// since the reference to the atomic ended its lifetime in the block above
assert_eq!(unsafe { *ptr }, 1);

// Deallocate the value
unsafe { drop(Box::from_raw(ptr)) }

Safety

• ptr must be aligned to align_of::<AtomicI128>() (note that on some platforms this can be bigger than align_of::<i128>()).
• ptr must be valid for both reads and writes for the whole lifetime 'a.
• You must adhere to the Memory model for atomic accesses. In particular, it is not allowed to mix conflicting atomic and non-atomic accesses, or atomic accesses of different sizes, without synchronization.

Creates a new pointer to an atomic integer from a pointer.

This is useful if you want to do volatile atomic accesses, and thus avoid creating a reference to the destination.

Returns a mutable reference to the underlying integer.

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let mut some_var = AtomicI128::new(10);
assert_eq!(*some_var.get_mut(), 10);
*some_var.get_mut() = 5;
assert_eq!(some_var.load(Ordering::SeqCst), 5);

Get atomic access to a &mut i128.

Note: This function is only available on targets where AtomicI128 has the same alignment as i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let mut some_int = 123;
let a = AtomicI128::from_mut(&mut some_int);
a.store(100, Ordering::Relaxed);
assert_eq!(some_int, 100);

Get non-atomic access to a &mut [AtomicI128] slice

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let mut some_ints = [const { AtomicI128::new(0) }; 10];

let view: &mut [i128] = AtomicI128::get_mut_slice(&mut some_ints);
assert_eq!(view, [0; 10]);
view
    .iter_mut()
    .enumerate()
    .for_each(|(idx, int)| *int = idx as _);

std::thread::scope(|s| {
    some_ints
        .iter()
        .enumerate()
        .for_each(|(idx, int)| {
            s.spawn(move || assert_eq!(int.load(Ordering::Relaxed), idx as _));
        })
});

Get atomic access to a &mut [i128] slice.

Note: This function is only available on targets where AtomicI128 has the same alignment as i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let mut some_ints = [0; 10];
let a = &*AtomicI128::from_mut_slice(&mut some_ints);
std::thread::scope(|s| {
    for i in 0..a.len() {
        s.spawn(move || a[i].store(i as _, Ordering::Relaxed));
    }
});
for (i, n) in some_ints.into_iter().enumerate() {
    assert_eq!(i, n as usize);
}

Consumes the atomic and returns the contained value.

This is safe because passing self by value guarantees that no other threads are concurrently accessing the atomic data.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::AtomicI128;

let some_var = AtomicI128::new(5);
assert_eq!(some_var.into_inner(), 5);

Loads a value from the atomic integer.

load takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Panics

Panics if order is Release or AcqRel.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let some_var = AtomicI128::new(5);

assert_eq!(some_var.load(Ordering::Relaxed), 5);

Perform a volatile load from the atomic integer.

load_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls, but less opaque), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [load][Self::load], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to reusing data from a previous load. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for reads. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a read are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance][crate::ptr::without_provenance]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic load. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be valid for reads, or self must point to memory outside of all Rust allocations and reading from that memory must:

  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

• self must be aligned to align_of::<AtomicI128>() (note that on some platforms this can be bigger than align_of::<i128>()).

• Reading from self must produce a properly initialized value of the underlying integer type.

Panics

Panics if order is Release or AcqRel.

Stores a value into the atomic integer.

store takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Panics

Panics if order is Acquire or AcqRel.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let some_var = AtomicI128::new(5);

some_var.store(10, Ordering::Relaxed);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Performs a volatile store into the atomic integer.

store_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [store][Self::store], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to a register access. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for writes. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a write are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance_mut][crate::ptr::without_provenance_mut]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic store. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be either valid for writes, or self must point to memory outside of all Rust allocations and writing to that memory must:

  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

• self must be aligned to align_of::<AtomicI128>() (note that on some platforms this can be bigger than align_of::<i128>()).

Panics

Panics if order is Acquire or AcqRel.

Stores a value into the atomic integer, returning the previous value.

swap takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let some_var = AtomicI128::new(5);

assert_eq!(some_var.swap(10, Ordering::Relaxed), 5);

Stores a value into the atomic integer if the current value is the same as the current value.

The return value is always the previous value. If it is equal to current, then the value was updated.

compare_and_swap also takes an Ordering argument which describes the memory ordering of this operation. Notice that even when using AcqRel, the operation might fail and hence just perform an Acquire load, but not have Release semantics. Using Acquire makes the store part of this operation Relaxed if it happens, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Migrating to compare_exchange and compare_exchange_weak

compare_and_swap is equivalent to compare_exchange with the following mapping for memory orderings:

compare_and_swap and compare_exchange also differ in their return type. You can use compare_exchange(...).unwrap_or_else(|x| x) to recover the behavior of compare_and_swap, but in most cases it is more idiomatic to check whether the return value is Ok or Err rather than to infer success vs failure based on the value that was read.

During migration, consider whether it makes sense to use compare_exchange_weak instead. compare_exchange_weak is allowed to fail spuriously even when the comparison succeeds, which allows the compiler to generate better assembly code when the compare and swap is used in a loop.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let some_var = AtomicI128::new(5);

assert_eq!(some_var.compare_and_swap(5, 10, Ordering::Relaxed), 5);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

assert_eq!(some_var.compare_and_swap(6, 12, Ordering::Relaxed), 10);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Stores a value into the atomic integer if the current value is the same as the current value.

The return value is a result indicating whether the new value was written and containing the previous value. On success this value is guaranteed to be equal to current.

compare_exchange takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let some_var = AtomicI128::new(5);

assert_eq!(some_var.compare_exchange(5, 10,
                                     Ordering::Acquire,
                                     Ordering::Relaxed),
           Ok(5));
assert_eq!(some_var.load(Ordering::Relaxed), 10);

assert_eq!(some_var.compare_exchange(6, 12,
                                     Ordering::SeqCst,
                                     Ordering::Acquire),
           Err(10));
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim! This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. This is a particularly common case for pointers, as a pointer holding the same address does not imply that the same object exists at that address! In this case, compare_exchange can lead to the ABA problem.

Stores a value into the atomic integer if the current value is the same as the current value.

Unlike AtomicI128::compare_exchange, this function is allowed to spuriously fail even when the comparison succeeds, which can result in more efficient code on some platforms. The return value is a result indicating whether the new value was written and containing the previous value.

compare_exchange_weak takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let val = AtomicI128::new(4);

let mut old = val.load(Ordering::Relaxed);
loop {
    let new = old * 2;
    match val.compare_exchange_weak(old, new, Ordering::SeqCst, Ordering::Relaxed) {
        Ok(_) => break,
        Err(x) => old = x,
    }
}

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim. This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. This is a particularly common case for pointers, as a pointer holding the same address does not imply that the same object exists at that address! In this case, compare_exchange can lead to the ABA problem.

Adds to the current value, returning the previous value.

This operation wraps around on overflow.

fetch_add takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(0);
assert_eq!(foo.fetch_add(10, Ordering::SeqCst), 0);
assert_eq!(foo.load(Ordering::SeqCst), 10);

Subtracts from the current value, returning the previous value.

This operation wraps around on overflow.

fetch_sub takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(20);
assert_eq!(foo.fetch_sub(10, Ordering::SeqCst), 20);
assert_eq!(foo.load(Ordering::SeqCst), 10);

Bitwise "and" with the current value.

Performs a bitwise "and" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_and takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(0b101101);
assert_eq!(foo.fetch_and(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b100001);

Bitwise "nand" with the current value.

Performs a bitwise "nand" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_nand takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(0x13);
assert_eq!(foo.fetch_nand(0x31, Ordering::SeqCst), 0x13);
assert_eq!(foo.load(Ordering::SeqCst), !(0x13 & 0x31));

Bitwise "or" with the current value.

Performs a bitwise "or" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_or takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(0b101101);
assert_eq!(foo.fetch_or(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b111111);

Bitwise "xor" with the current value.

Performs a bitwise "xor" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_xor takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(0b101101);
assert_eq!(foo.fetch_xor(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b011110);

An alias for AtomicI128::try_update .

Fetches the value, and applies a function to it that returns an optional new value. Returns a Result of Ok(previous_value) if the function returned Some(_), else Err(previous_value).

See also: update.

Note: This may call the function multiple times if the value has been changed from other threads in the meantime, as long as the function returns Some(_), but the function will have been applied only once to the stored value.

try_update takes two Ordering arguments to describe the memory ordering of this operation. The first describes the required ordering for when the operation finally succeeds while the second describes the required ordering for loads. These correspond to the success and failure orderings of AtomicI128::compare_exchange respectively.

Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the final successful load Relaxed. The (failed) load ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Considerations

This method is not magic; it is not provided by the hardware, and does not act like a critical section or mutex.

It is implemented on top of an atomic compare-and-swap operation, and thus is subject to the usual drawbacks of CAS operations. In particular, be careful of the ABA problem if this atomic integer is an index or more generally if knowledge of only the bitwise value of the atomic is not in and of itself sufficient to ensure any required preconditions.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let x = AtomicI128::new(7);
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(7));
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(7));
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(8));
assert_eq!(x.load(Ordering::SeqCst), 9);

Fetches the value, and applies a function to it that returns a new value. The new value is stored and the old value is returned.

See also: try_update.

Note: This may call the function multiple times if the value has been changed from other threads in the meantime, but the function will have been applied only once to the stored value.

update takes two Ordering arguments to describe the memory ordering of this operation. The first describes the required ordering for when the operation finally succeeds while the second describes the required ordering for loads. These correspond to the success and failure orderings of AtomicI128::compare_exchange respectively.

Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the final successful load Relaxed. The (failed) load ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Considerations

This method is not magic; it is not provided by the hardware, and does not act like a critical section or mutex.

It is implemented on top of an atomic compare-and-swap operation, and thus is subject to the usual drawbacks of CAS operations. In particular, be careful of the ABA problem if this atomic integer is an index or more generally if knowledge of only the bitwise value of the atomic is not in and of itself sufficient to ensure any required preconditions.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let x = AtomicI128::new(7);
assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| x + 1), 7);
assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| x + 1), 8);
assert_eq!(x.load(Ordering::SeqCst), 9);

Maximum with the current value.

Finds the maximum of the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_max takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(23);
assert_eq!(foo.fetch_max(42, Ordering::SeqCst), 23);
assert_eq!(foo.load(Ordering::SeqCst), 42);

If you want to obtain the maximum value in one step, you can use the following:

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(23);
let bar = 42;
let max_foo = foo.fetch_max(bar, Ordering::SeqCst).max(bar);
assert!(max_foo == 42);

Minimum with the current value.

Finds the minimum of the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_min takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i128.

Examples

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(23);
assert_eq!(foo.fetch_min(42, Ordering::Relaxed), 23);
assert_eq!(foo.load(Ordering::Relaxed), 23);
assert_eq!(foo.fetch_min(22, Ordering::Relaxed), 23);
assert_eq!(foo.load(Ordering::Relaxed), 22);

If you want to obtain the minimum value in one step, you can use the following:

#![feature(integer_atomics)]

use std::sync::atomic::{AtomicI128, Ordering};

let foo = AtomicI128::new(23);
let bar = 12;
let min_foo = foo.fetch_min(bar, Ordering::SeqCst).min(bar);
assert_eq!(min_foo, 12);

Returns a mutable pointer to the underlying integer.

Doing non-atomic reads and writes on the resulting integer can be a data race. This method is mostly useful for FFI, where the function signature may use *mut i128 instead of &AtomicI128.

Returning an *mut pointer from a shared reference to this atomic is safe because the atomic types work with interior mutability. All modifications of an atomic change the value through a shared reference, and can do so safely as long as they use atomic operations. Any use of the returned raw pointer requires an unsafe block and still has to uphold the requirements of the memory model.

Examples

# fn main() {
#![feature(integer_atomics)]

use std::sync::atomic::AtomicI128;

extern "C" {
    fn my_atomic_op(arg: *mut i128);
}

let atomic = AtomicI128::new(1);

// SAFETY: Safe as long as `my_atomic_op` is atomic.
unsafe {
    my_atomic_op(atomic.as_ptr());
}
# }

Creates a new atomic integer.

Examples

use std::sync::atomic::AtomicI16;

let atomic_forty_two = AtomicI16::new(42);

Creates a new reference to an atomic integer from a pointer.

Examples

use std::sync::atomic::{self, AtomicI16};

// Get a pointer to an allocated value
let ptr: *mut i16 = Box::into_raw(Box::new(0));

assert!(ptr.cast::<AtomicI16>().is_aligned());

{
    // Create an atomic view of the allocated value
    let atomic = unsafe {AtomicI16::from_ptr(ptr) };

    // Use `atomic` for atomic operations, possibly share it with other threads
    atomic.store(1, atomic::Ordering::Relaxed);
}

// It's ok to non-atomically access the value behind `ptr`,
// since the reference to the atomic ended its lifetime in the block above
assert_eq!(unsafe { *ptr }, 1);

// Deallocate the value
unsafe { drop(Box::from_raw(ptr)) }

Safety

• ptr must be aligned to align_of::<AtomicI16>() (note that on some platforms this can be bigger than align_of::<i16>()).
• ptr must be valid for both reads and writes for the whole lifetime 'a.
• You must adhere to the Memory model for atomic accesses. In particular, it is not allowed to mix conflicting atomic and non-atomic accesses, or atomic accesses of different sizes, without synchronization.

Creates a new pointer to an atomic integer from a pointer.

This is useful if you want to do volatile atomic accesses, and thus avoid creating a reference to the destination.

Returns a mutable reference to the underlying integer.

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let mut some_var = AtomicI16::new(10);
assert_eq!(*some_var.get_mut(), 10);
*some_var.get_mut() = 5;
assert_eq!(some_var.load(Ordering::SeqCst), 5);

Get atomic access to a &mut i16.

Note: This function is only available on targets where AtomicI16 has the same alignment as i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let mut some_int = 123;
let a = AtomicI16::from_mut(&mut some_int);
a.store(100, Ordering::Relaxed);
assert_eq!(some_int, 100);

Get non-atomic access to a &mut [AtomicI16] slice

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let mut some_ints = [const { AtomicI16::new(0) }; 10];

let view: &mut [i16] = AtomicI16::get_mut_slice(&mut some_ints);
assert_eq!(view, [0; 10]);
view
    .iter_mut()
    .enumerate()
    .for_each(|(idx, int)| *int = idx as _);

std::thread::scope(|s| {
    some_ints
        .iter()
        .enumerate()
        .for_each(|(idx, int)| {
            s.spawn(move || assert_eq!(int.load(Ordering::Relaxed), idx as _));
        })
});

Get atomic access to a &mut [i16] slice.

Note: This function is only available on targets where AtomicI16 has the same alignment as i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let mut some_ints = [0; 10];
let a = &*AtomicI16::from_mut_slice(&mut some_ints);
std::thread::scope(|s| {
    for i in 0..a.len() {
        s.spawn(move || a[i].store(i as _, Ordering::Relaxed));
    }
});
for (i, n) in some_ints.into_iter().enumerate() {
    assert_eq!(i, n as usize);
}

Consumes the atomic and returns the contained value.

This is safe because passing self by value guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::AtomicI16;

let some_var = AtomicI16::new(5);
assert_eq!(some_var.into_inner(), 5);

Loads a value from the atomic integer.

load takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Panics

Panics if order is Release or AcqRel.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let some_var = AtomicI16::new(5);

assert_eq!(some_var.load(Ordering::Relaxed), 5);

Perform a volatile load from the atomic integer.

load_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls, but less opaque), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [load][Self::load], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to reusing data from a previous load. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for reads. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a read are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance][crate::ptr::without_provenance]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic load. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be valid for reads, or self must point to memory outside of all Rust allocations and reading from that memory must:

  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

• self must be aligned to align_of::<AtomicI16>() (note that on some platforms this can be bigger than align_of::<i16>()).

• Reading from self must produce a properly initialized value of the underlying integer type.

Panics

Panics if order is Release or AcqRel.

Stores a value into the atomic integer.

store takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Panics

Panics if order is Acquire or AcqRel.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let some_var = AtomicI16::new(5);

some_var.store(10, Ordering::Relaxed);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Performs a volatile store into the atomic integer.

store_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [store][Self::store], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to a register access. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for writes. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a write are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance_mut][crate::ptr::without_provenance_mut]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic store. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be either valid for writes, or self must point to memory outside of all Rust allocations and writing to that memory must:

  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

• self must be aligned to align_of::<AtomicI16>() (note that on some platforms this can be bigger than align_of::<i16>()).

Panics

Panics if order is Acquire or AcqRel.

Stores a value into the atomic integer, returning the previous value.

swap takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let some_var = AtomicI16::new(5);

assert_eq!(some_var.swap(10, Ordering::Relaxed), 5);

Stores a value into the atomic integer if the current value is the same as the current value.

The return value is always the previous value. If it is equal to current, then the value was updated.

compare_and_swap also takes an Ordering argument which describes the memory ordering of this operation. Notice that even when using AcqRel, the operation might fail and hence just perform an Acquire load, but not have Release semantics. Using Acquire makes the store part of this operation Relaxed if it happens, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Migrating to compare_exchange and compare_exchange_weak

compare_and_swap is equivalent to compare_exchange with the following mapping for memory orderings:

compare_and_swap and compare_exchange also differ in their return type. You can use compare_exchange(...).unwrap_or_else(|x| x) to recover the behavior of compare_and_swap, but in most cases it is more idiomatic to check whether the return value is Ok or Err rather than to infer success vs failure based on the value that was read.

During migration, consider whether it makes sense to use compare_exchange_weak instead. compare_exchange_weak is allowed to fail spuriously even when the comparison succeeds, which allows the compiler to generate better assembly code when the compare and swap is used in a loop.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let some_var = AtomicI16::new(5);

assert_eq!(some_var.compare_and_swap(5, 10, Ordering::Relaxed), 5);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

assert_eq!(some_var.compare_and_swap(6, 12, Ordering::Relaxed), 10);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Stores a value into the atomic integer if the current value is the same as the current value.

The return value is a result indicating whether the new value was written and containing the previous value. On success this value is guaranteed to be equal to current.

compare_exchange takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let some_var = AtomicI16::new(5);

assert_eq!(some_var.compare_exchange(5, 10,
                                     Ordering::Acquire,
                                     Ordering::Relaxed),
           Ok(5));
assert_eq!(some_var.load(Ordering::Relaxed), 10);

assert_eq!(some_var.compare_exchange(6, 12,
                                     Ordering::SeqCst,
                                     Ordering::Acquire),
           Err(10));
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim! This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. This is a particularly common case for pointers, as a pointer holding the same address does not imply that the same object exists at that address! In this case, compare_exchange can lead to the ABA problem.

Stores a value into the atomic integer if the current value is the same as the current value.

Unlike AtomicI16::compare_exchange, this function is allowed to spuriously fail even when the comparison succeeds, which can result in more efficient code on some platforms. The return value is a result indicating whether the new value was written and containing the previous value.

compare_exchange_weak takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let val = AtomicI16::new(4);

let mut old = val.load(Ordering::Relaxed);
loop {
    let new = old * 2;
    match val.compare_exchange_weak(old, new, Ordering::SeqCst, Ordering::Relaxed) {
        Ok(_) => break,
        Err(x) => old = x,
    }
}

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim. This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. This is a particularly common case for pointers, as a pointer holding the same address does not imply that the same object exists at that address! In this case, compare_exchange can lead to the ABA problem.

Adds to the current value, returning the previous value.

This operation wraps around on overflow.

fetch_add takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(0);
assert_eq!(foo.fetch_add(10, Ordering::SeqCst), 0);
assert_eq!(foo.load(Ordering::SeqCst), 10);

Subtracts from the current value, returning the previous value.

This operation wraps around on overflow.

fetch_sub takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(20);
assert_eq!(foo.fetch_sub(10, Ordering::SeqCst), 20);
assert_eq!(foo.load(Ordering::SeqCst), 10);

Bitwise "and" with the current value.

Performs a bitwise "and" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_and takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(0b101101);
assert_eq!(foo.fetch_and(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b100001);

Bitwise "nand" with the current value.

Performs a bitwise "nand" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_nand takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(0x13);
assert_eq!(foo.fetch_nand(0x31, Ordering::SeqCst), 0x13);
assert_eq!(foo.load(Ordering::SeqCst), !(0x13 & 0x31));

Bitwise "or" with the current value.

Performs a bitwise "or" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_or takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(0b101101);
assert_eq!(foo.fetch_or(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b111111);

Bitwise "xor" with the current value.

Performs a bitwise "xor" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_xor takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(0b101101);
assert_eq!(foo.fetch_xor(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b011110);

An alias for AtomicI16::try_update .

Fetches the value, and applies a function to it that returns an optional new value. Returns a Result of Ok(previous_value) if the function returned Some(_), else Err(previous_value).

See also: update.

Note: This may call the function multiple times if the value has been changed from other threads in the meantime, as long as the function returns Some(_), but the function will have been applied only once to the stored value.

try_update takes two Ordering arguments to describe the memory ordering of this operation. The first describes the required ordering for when the operation finally succeeds while the second describes the required ordering for loads. These correspond to the success and failure orderings of AtomicI16::compare_exchange respectively.

Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the final successful load Relaxed. The (failed) load ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Considerations

This method is not magic; it is not provided by the hardware, and does not act like a critical section or mutex.

It is implemented on top of an atomic compare-and-swap operation, and thus is subject to the usual drawbacks of CAS operations. In particular, be careful of the ABA problem if this atomic integer is an index or more generally if knowledge of only the bitwise value of the atomic is not in and of itself sufficient to ensure any required preconditions.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let x = AtomicI16::new(7);
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |_| None), Err(7));
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(7));
assert_eq!(x.try_update(Ordering::SeqCst, Ordering::SeqCst, |x| Some(x + 1)), Ok(8));
assert_eq!(x.load(Ordering::SeqCst), 9);

Fetches the value, and applies a function to it that returns a new value. The new value is stored and the old value is returned.

See also: try_update.

Note: This may call the function multiple times if the value has been changed from other threads in the meantime, but the function will have been applied only once to the stored value.

update takes two Ordering arguments to describe the memory ordering of this operation. The first describes the required ordering for when the operation finally succeeds while the second describes the required ordering for loads. These correspond to the success and failure orderings of AtomicI16::compare_exchange respectively.

Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the final successful load Relaxed. The (failed) load ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Considerations

This method is not magic; it is not provided by the hardware, and does not act like a critical section or mutex.

It is implemented on top of an atomic compare-and-swap operation, and thus is subject to the usual drawbacks of CAS operations. In particular, be careful of the ABA problem if this atomic integer is an index or more generally if knowledge of only the bitwise value of the atomic is not in and of itself sufficient to ensure any required preconditions.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let x = AtomicI16::new(7);
assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| x + 1), 7);
assert_eq!(x.update(Ordering::SeqCst, Ordering::SeqCst, |x| x + 1), 8);
assert_eq!(x.load(Ordering::SeqCst), 9);

Maximum with the current value.

Finds the maximum of the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_max takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(23);
assert_eq!(foo.fetch_max(42, Ordering::SeqCst), 23);
assert_eq!(foo.load(Ordering::SeqCst), 42);

If you want to obtain the maximum value in one step, you can use the following:

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(23);
let bar = 42;
let max_foo = foo.fetch_max(bar, Ordering::SeqCst).max(bar);
assert!(max_foo == 42);

Minimum with the current value.

Finds the minimum of the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_min takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i16.

Examples

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(23);
assert_eq!(foo.fetch_min(42, Ordering::Relaxed), 23);
assert_eq!(foo.load(Ordering::Relaxed), 23);
assert_eq!(foo.fetch_min(22, Ordering::Relaxed), 23);
assert_eq!(foo.load(Ordering::Relaxed), 22);

If you want to obtain the minimum value in one step, you can use the following:

use std::sync::atomic::{AtomicI16, Ordering};

let foo = AtomicI16::new(23);
let bar = 12;
let min_foo = foo.fetch_min(bar, Ordering::SeqCst).min(bar);
assert_eq!(min_foo, 12);

Returns a mutable pointer to the underlying integer.

Doing non-atomic reads and writes on the resulting integer can be a data race. This method is mostly useful for FFI, where the function signature may use *mut i16 instead of &AtomicI16.

Returning an *mut pointer from a shared reference to this atomic is safe because the atomic types work with interior mutability. All modifications of an atomic change the value through a shared reference, and can do so safely as long as they use atomic operations. Any use of the returned raw pointer requires an unsafe block and still has to uphold the requirements of the memory model.

Examples

# fn main() {
use std::sync::atomic::AtomicI16;

extern "C" {
    fn my_atomic_op(arg: *mut i16);
}

let atomic = AtomicI16::new(1);

// SAFETY: Safe as long as `my_atomic_op` is atomic.
unsafe {
    my_atomic_op(atomic.as_ptr());
}
# }

Creates a new atomic integer.

Examples

use std::sync::atomic::AtomicI32;

let atomic_forty_two = AtomicI32::new(42);

Creates a new reference to an atomic integer from a pointer.

Examples

use std::sync::atomic::{self, AtomicI32};

// Get a pointer to an allocated value
let ptr: *mut i32 = Box::into_raw(Box::new(0));

assert!(ptr.cast::<AtomicI32>().is_aligned());

{
    // Create an atomic view of the allocated value
    let atomic = unsafe {AtomicI32::from_ptr(ptr) };

    // Use `atomic` for atomic operations, possibly share it with other threads
    atomic.store(1, atomic::Ordering::Relaxed);
}

// It's ok to non-atomically access the value behind `ptr`,
// since the reference to the atomic ended its lifetime in the block above
assert_eq!(unsafe { *ptr }, 1);

// Deallocate the value
unsafe { drop(Box::from_raw(ptr)) }

Safety

• ptr must be aligned to align_of::<AtomicI32>() (note that on some platforms this can be bigger than align_of::<i32>()).
• ptr must be valid for both reads and writes for the whole lifetime 'a.
• You must adhere to the Memory model for atomic accesses. In particular, it is not allowed to mix conflicting atomic and non-atomic accesses, or atomic accesses of different sizes, without synchronization.

Creates a new pointer to an atomic integer from a pointer.

This is useful if you want to do volatile atomic accesses, and thus avoid creating a reference to the destination.

Returns a mutable reference to the underlying integer.

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let mut some_var = AtomicI32::new(10);
assert_eq!(*some_var.get_mut(), 10);
*some_var.get_mut() = 5;
assert_eq!(some_var.load(Ordering::SeqCst), 5);

Get atomic access to a &mut i32.

Note: This function is only available on targets where AtomicI32 has the same alignment as i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let mut some_int = 123;
let a = AtomicI32::from_mut(&mut some_int);
a.store(100, Ordering::Relaxed);
assert_eq!(some_int, 100);

Get non-atomic access to a &mut [AtomicI32] slice

This is safe because the mutable reference guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let mut some_ints = [const { AtomicI32::new(0) }; 10];

let view: &mut [i32] = AtomicI32::get_mut_slice(&mut some_ints);
assert_eq!(view, [0; 10]);
view
    .iter_mut()
    .enumerate()
    .for_each(|(idx, int)| *int = idx as _);

std::thread::scope(|s| {
    some_ints
        .iter()
        .enumerate()
        .for_each(|(idx, int)| {
            s.spawn(move || assert_eq!(int.load(Ordering::Relaxed), idx as _));
        })
});

Get atomic access to a &mut [i32] slice.

Note: This function is only available on targets where AtomicI32 has the same alignment as i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let mut some_ints = [0; 10];
let a = &*AtomicI32::from_mut_slice(&mut some_ints);
std::thread::scope(|s| {
    for i in 0..a.len() {
        s.spawn(move || a[i].store(i as _, Ordering::Relaxed));
    }
});
for (i, n) in some_ints.into_iter().enumerate() {
    assert_eq!(i, n as usize);
}

Consumes the atomic and returns the contained value.

This is safe because passing self by value guarantees that no other threads are concurrently accessing the atomic data.

Examples

use std::sync::atomic::AtomicI32;

let some_var = AtomicI32::new(5);
assert_eq!(some_var.into_inner(), 5);

Loads a value from the atomic integer.

load takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Panics

Panics if order is Release or AcqRel.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let some_var = AtomicI32::new(5);

assert_eq!(some_var.load(Ordering::Relaxed), 5);

Perform a volatile load from the atomic integer.

load_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Acquire and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls, but less opaque), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [load][Self::load], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to reusing data from a previous load. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for reads. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a read are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance][crate::ptr::without_provenance]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic load. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be valid for reads, or self must point to memory outside of all Rust allocations and reading from that memory must:

  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

• self must be aligned to align_of::<AtomicI32>() (note that on some platforms this can be bigger than align_of::<i32>()).

• Reading from self must produce a properly initialized value of the underlying integer type.

Panics

Panics if order is Release or AcqRel.

Stores a value into the atomic integer.

store takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Panics

Panics if order is Acquire or AcqRel.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let some_var = AtomicI32::new(5);

some_var.store(10, Ordering::Relaxed);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Performs a volatile store into the atomic integer.

store_volatile takes an Ordering argument which describes the memory ordering of this operation. Possible values are SeqCst, Release and Relaxed.

Volatile operations are intended to act on I/O memory. As such, they are considered externally observable events (just like syscalls), and are guaranteed to not be elided or reordered by the compiler across other externally observable events. With this in mind, there are two cases of usage that need to be distinguished:

• When a volatile operation is used for memory inside an allocation, it behaves exactly like [store][Self::store], except for the additional guarantee that it won't be elided or reordered across other externally observable events (see above). This implies that the operation will actually access memory and not e.g. be lowered to a register access. Other than that, all the usual rules for memory accesses apply (including provenance).

• Volatile operations, however, may also be used to access memory that is outside of any Rust allocation. In this use-case, the pointer does not have to be valid for writes. This is typically used for CPU and peripheral registers that must be accessed via an I/O memory mapping, most commonly at fixed addresses reserved by the hardware. These often have special semantics associated to their manipulation, and cannot be used as general purpose memory. Here, any address value is possible, including 0 and usize::MAX, so long as the semantics of such a write are well-defined by the target hardware. The provenance of the pointer is irrelevant, and it can be created with [without_provenance_mut][crate::ptr::without_provenance_mut]. The access is allowed to trap, which must immediately abort the process. It can also cause other side-effects, but those must not affect Rust-allocated memory in any way.

In both cases, the access is also considered atomic with the given order. This allows synchronization with other threads or devices that share memory with this program.

When invoked during const evaluation, this behaves like a regular atomic store. In particular, such reads must always follow the first of the two cases above.

Safety

Behavior is undefined if any of the following conditions are violated:

• self must be either valid for writes, or self must point to memory outside of all Rust allocations and writing to that memory must:

  • not trap, and
  • not cause any memory inside a Rust allocation to be modified.

• self must be aligned to align_of::<AtomicI32>() (note that on some platforms this can be bigger than align_of::<i32>()).

Panics

Panics if order is Acquire or AcqRel.

Stores a value into the atomic integer, returning the previous value.

swap takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let some_var = AtomicI32::new(5);

assert_eq!(some_var.swap(10, Ordering::Relaxed), 5);

Stores a value into the atomic integer if the current value is the same as the current value.

The return value is always the previous value. If it is equal to current, then the value was updated.

compare_and_swap also takes an Ordering argument which describes the memory ordering of this operation. Notice that even when using AcqRel, the operation might fail and hence just perform an Acquire load, but not have Release semantics. Using Acquire makes the store part of this operation Relaxed if it happens, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Migrating to compare_exchange and compare_exchange_weak

compare_and_swap is equivalent to compare_exchange with the following mapping for memory orderings:

compare_and_swap and compare_exchange also differ in their return type. You can use compare_exchange(...).unwrap_or_else(|x| x) to recover the behavior of compare_and_swap, but in most cases it is more idiomatic to check whether the return value is Ok or Err rather than to infer success vs failure based on the value that was read.

During migration, consider whether it makes sense to use compare_exchange_weak instead. compare_exchange_weak is allowed to fail spuriously even when the comparison succeeds, which allows the compiler to generate better assembly code when the compare and swap is used in a loop.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let some_var = AtomicI32::new(5);

assert_eq!(some_var.compare_and_swap(5, 10, Ordering::Relaxed), 5);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

assert_eq!(some_var.compare_and_swap(6, 12, Ordering::Relaxed), 10);
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Stores a value into the atomic integer if the current value is the same as the current value.

The return value is a result indicating whether the new value was written and containing the previous value. On success this value is guaranteed to be equal to current.

compare_exchange takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let some_var = AtomicI32::new(5);

assert_eq!(some_var.compare_exchange(5, 10,
                                     Ordering::Acquire,
                                     Ordering::Relaxed),
           Ok(5));
assert_eq!(some_var.load(Ordering::Relaxed), 10);

assert_eq!(some_var.compare_exchange(6, 12,
                                     Ordering::SeqCst,
                                     Ordering::Acquire),
           Err(10));
assert_eq!(some_var.load(Ordering::Relaxed), 10);

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim! This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. This is a particularly common case for pointers, as a pointer holding the same address does not imply that the same object exists at that address! In this case, compare_exchange can lead to the ABA problem.

Stores a value into the atomic integer if the current value is the same as the current value.

Unlike AtomicI32::compare_exchange, this function is allowed to spuriously fail even when the comparison succeeds, which can result in more efficient code on some platforms. The return value is a result indicating whether the new value was written and containing the previous value.

compare_exchange_weak takes two Ordering arguments to describe the memory ordering of this operation. success describes the required ordering for the read-modify-write operation that takes place if the comparison with current succeeds. failure describes the required ordering for the load operation that takes place when the comparison fails. Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the successful load Relaxed. The failure ordering can only be SeqCst, Acquire or Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let val = AtomicI32::new(4);

let mut old = val.load(Ordering::Relaxed);
loop {
    let new = old * 2;
    match val.compare_exchange_weak(old, new, Ordering::SeqCst, Ordering::Relaxed) {
        Ok(_) => break,
        Err(x) => old = x,
    }
}

Considerations

compare_exchange is a compare-and-swap operation and thus exhibits the usual downsides of CAS operations. In particular, a load of the value followed by a successful compare_exchange with the previous load does not ensure that other threads have not changed the value in the interim. This is usually important when the equality check in the compare_exchange is being used to check the identity of a value, but equality does not necessarily imply identity. This is a particularly common case for pointers, as a pointer holding the same address does not imply that the same object exists at that address! In this case, compare_exchange can lead to the ABA problem.

Adds to the current value, returning the previous value.

This operation wraps around on overflow.

fetch_add takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let foo = AtomicI32::new(0);
assert_eq!(foo.fetch_add(10, Ordering::SeqCst), 0);
assert_eq!(foo.load(Ordering::SeqCst), 10);

Subtracts from the current value, returning the previous value.

This operation wraps around on overflow.

fetch_sub takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let foo = AtomicI32::new(20);
assert_eq!(foo.fetch_sub(10, Ordering::SeqCst), 20);
assert_eq!(foo.load(Ordering::SeqCst), 10);

Bitwise "and" with the current value.

Performs a bitwise "and" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_and takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let foo = AtomicI32::new(0b101101);
assert_eq!(foo.fetch_and(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b100001);

Bitwise "nand" with the current value.

Performs a bitwise "nand" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_nand takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let foo = AtomicI32::new(0x13);
assert_eq!(foo.fetch_nand(0x31, Ordering::SeqCst), 0x13);
assert_eq!(foo.load(Ordering::SeqCst), !(0x13 & 0x31));

Bitwise "or" with the current value.

Performs a bitwise "or" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_or takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let foo = AtomicI32::new(0b101101);
assert_eq!(foo.fetch_or(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b111111);

Bitwise "xor" with the current value.

Performs a bitwise "xor" operation on the current value and the argument val, and sets the new value to the result.

Returns the previous value.

fetch_xor takes an Ordering argument which describes the memory ordering of this operation. All ordering modes are possible. Note that using Acquire makes the store part of this operation Relaxed, and using Release makes the load part Relaxed.

Note: This method is only available on platforms that support atomic operations on i32.

Examples

use std::sync::atomic::{AtomicI32, Ordering};

let foo = AtomicI32::new(0b101101);
assert_eq!(foo.fetch_xor(0b110011, Ordering::SeqCst), 0b101101);
assert_eq!(foo.load(Ordering::SeqCst), 0b011110);

An alias for AtomicI32::try_update .

Fetches the value, and applies a function to it that returns an optional new value. Returns a Result of Ok(previous_value) if the function returned Some(_), else Err(previous_value).

See also: update.

Note: This may call the function multiple times if the value has been changed from other threads in the meantime, as long as the function returns Some(_), but the function will have been applied only once to the stored value.

try_update takes two Ordering arguments to describe the memory ordering of this operation. The first describes the required ordering for when the operation finally succeeds while the second describes the required ordering for loads. These correspond to the success and failure orderings of AtomicI32::compare_exchange respectively.

Using Acquire as success ordering makes the store part of this operation Relaxed, and using Release makes the final successful load Relaxed. The (failed) load ordering can only be SeqCst, Acquire or Relaxed.